An indirect file that extends command line arguments.
A linker control file to control placement of sections and how linking proceeds.
Arm or RISC-V object libraries created by a librarian.
In addition, the following files can be used as input to the linker: Standard-conforming toolchains such as SEGGER Embedded Studio. The SEGGER linker accepts one or more Arm or RISC-V ELF object files generated by
Optionally generates a log file that provides additional information about the linking process.
Writes a map file that is clean and easily understood.
Generates range extension veneers as required for branch and branch-and-link instructions.
Accepts standard Arm and RISC-V ELF object files and libraries from any toolset.
SEGGER J FLASH ARM KEYGEN GENERATOR CODE
Eliminates all unused code and data for a minimum-size image.
Will copy initialized data with optional flash-image compression.
Easily places code in RAM with optional flash-image compression.
Automatically generate runtime initialization code prior to entering main().
Sort code and data sections for improved packing or by user preference.
Avoid placing code and data in “keep out areas.”.
Place a function or data at a specific address with ease.
Flow code and data over multiple memory areas.
Highly efficient and very fast to link.
The SEGGER Linker has the following features: Suitable for programming a Cortex microcontroller. The linker combines the one or more ELF object files and supportingĮLF object libraries to produce an executable image. The SEGGER Linker is a fast linker that links applications for execution This section presents an overview of the SEGGER Linker and its capabilities. SEGGER Linker User Guide & Reference ManualĪ linker for Arm and RISC-V microcontrollers.